********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*Aug 04, 2014
*ECN S14-1589, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si3443DDV D G S 
M1 3 GX S S PMOS W= 1230000u L= 0.3u 
M2 S GX S D NMOS W= 1230000u L= 0.21u 
R1 D 3 2.259e-02 2.510e-03 -1.511e-06 
CGS GX S 4.454e-10 
CGD GX D 4.784e-11 
RG G GY 12.3 
RTCV 100 S 1e6 -9.506e-05 2.002e-07 
ETCV GY GX 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD D S DBD 1230000u 
**************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 3e-8 
+ RS = 0 KP = 4.733e-06 NSUB = 8.874e+15 
+ KAPPA = 1.113e-03 NFS = 8.808e+11 
+ LD = 0 IS = 0 TPG = -1 CAPOP = 12 ) 
*************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 3e-8 
+NSUB = 8.224e+16 IS = 0 TPG = -1 CAPOP = 12 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 1.164e-08 TREF = 25 BV = 21 
+RS = 1.503e-02 N = 1.909e+00 IS = 2.502e-07 
+EG = 7.900e-01 XTI = 9.999e+00 TRS = 1.000e-05 
+CJO = 3.198e-11 VJ = 3.000e-01 M = 2.940e-01 ) 
.ENDS 
